In recent years, semiconductor devices having a power MOS FET (MOS field effect transistor) structure and also a trench-gate structure have been widely applied to various types of power supplies, such as a DC-DC converter. In an example of such semiconductor devices having a trench-gate power MOS FET, a Schottky barrier diode is formed in parallel to the MOS FET structure, so as to decrease the Vf (i.e., forward voltage (drop)). FIG. 23 shows a sectional structure of a conventional semiconductor device, which has a power MOS FET.
A drain layer 201, which includes high-concentration N-type impurities, forms an N+-type silicon substrate. On the drain layer 201, a drift layer 202 is formed, which includes low-concentration N-type impurities. On the drift layer 202, P-type body areas 203 are formed, which include P-type impurities. In the vicinity of the surface of each P-type body area 203, a P+-type diffusion area 204 is formed, which includes P-type impurities having a concentration higher than that of the P-type body area 203. On the surface of each P-type body area 203, N+-type source areas 205 are also formed, which interpose the P+-type diffusion area 204 and include high-concentration N-type impurities.
A plurality of trenches 206, each having a rectangular sectional shape, are formed in an area from the surfaces of the P-type body areas 203 to the drift layer 202. On the inner face (i.e., including side wall faces 206a and a bottom face 206b) of each trench 206, a gate insulating film 207 is formed. In the trench 206, a gate electrode 208 is formed, which is made of poly-silicon and is surrounded by the gate insulating film 207, an insulating film 220, and an inter-layer insulating film 218. In the drift layer 202, no structure corresponding to the P-type body areas 203, the P+-type diffusion area 204, and the N+-type source areas 205 is formed between the trench 206 which contacts the P-type body area 203, and another trench 206. Each P-type body area 203 is formed between two adjacent trenches 206.
In the uppermost part of the above-described structure, a source electrode film 210, made of metal, is formed. The source electrode film 210 is electrically connected to the N+-type source areas 205 and the drift layer 202, and is insulated from the gate electrodes 208. The source electrode film 210 forms an Ohmic contact together with each N+-type source area 205, and forms a Schottky contact together with the drift layer 202. On the back surface of the drain layer 201, a drain electrode film 211, made of metal, is formed. The drain electrode film 211 forms an Ohmic contact together with the drain layer 201.
The drain layer 201, the drift layer 202, the P-type body areas 203, the N+-type source areas 205, the gate electrodes 208, the source electrode film 210, and the drain electrode film 211 form MOS FETs. In addition, the drain layer 201, the drift layer 202, and the source electrode film 210 form a Schottky barrier diode.
When the source electrode film 210 is grounded, a positive voltage is applied to the drain electrode film 211, and a positive voltage is also applied to each gate electrode 208, an inversion layer is formed at each interface between each P-type body area 203 and the relevant trenches 206, so that an electric current flows from the drain electrode film 211 to the source electrode film 210. In contrast, when the gate electrodes 208 and the drain electrode film 211 are grounded and a positive voltage is applied to the source electrode film 210, the PN junction between each P-type body area 203 and the drift layer 202, and the Schottky contact between the source electrode film 210 and the drift layer 202 are both set in forward bias conditions, so that an electric current flows from the source electrode film 210 to the drain electrode film 211. As the current also flows through the Schottky barrier diode, the Vf can be reduced in comparison with power MOS FETs which include no Schottky barrier diode. Patent Document 1 discloses a semiconductor device in which a Schottky barrier diode is formed in parallel to a trench-gate MOS FET structure.
Patent Document Published Japanese Translation, No. 2002-538602, of PCT International Publication, No. WO00/51167.
It is desired to reduce the Vf of power MOS FETs. On the other hand, conventional semiconductor devices having a trench-gate power MOS FET and a Schottky barrier diode have a problem in that when a reverse voltage is applied, a leakage current of the Schottky barrier diode increases in accordance with an increase in the temperature.